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the future of analog ic technology mp86885 intelli-phase solution (integrated hs/ls fets and driver) in 4x6mm tqfn mp86885 rev. 1.01 www.monolithicpower.com 1 7/22/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. description the mp86885 is a monolithic half-bridge with built-in internal power mosfets and gate drivers. it achieves 40a of continuous output current over a wide input supply range. integration of the driver and mosfets results in high efficiency due to optimal dead time control and parasitic inductance reduction. the mp86885 is a monolithic ic approach to drive up to 40a per phase. this very small 4mm x 6mm fc-tqfn device can operate from 100khz to 1mhz. this device works with tri-state output controllers. it also comes with a general- purpose current sense and temperature sense. the mp86885 is ideal for server applications where efficiency and small size are a premium. features ? wide 4.5v to 14v operating input range ? simple logic interface ? 40a output current ? accepts tri-state pwm signal ? built-in switch for bootstrap ? current sense ? temperature sense (10mv/ o c) ? current limit protection ? used for multi-phase operation ? fault reporting ? available in 4mm x 6mm fc-tqfn package ? rohs 6 compliant applications ? server/workstation/desktop core voltage ? graphic card core regulators ? power modules all mps parts are lead-free and adhere to the rohs directive. for mps green status, please visit mps website under quality assurance. ?mps? and ?the future of analog ic technology? are registered trademarks of monolithi c power systems, inc. intelli-phase is trademark of monolithic power systems, inc. typical application
mp86885 ? intelli-phase solution in 4x6mm tqfn mp86885 rev. 1.01 www.monolithicpower.com 2 7/22/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. ordering information part number* package top marking MP86885GQWT fc-tqfn-29 4x6(mm) m86885 * for tape & reel, add suffix ?z (e.g. MP86885GQWT?z). package reference absolute maxi mum ratings (1) supply voltage v in ....................................... 16v v sw (dc) ..............................................-1 v to 16v v sw (25ns) ..............................................-3v to 23v v bst ...................................................... v sw + 6v all other pins ..................................-0.3v to +6v instantaneous current ................................ 65a continuous power dissipation (t a =+25c) (2) ............................................................ 3.5 w junction temperature ...............................150c lead temperature ....................................260c storage temperature............... -65c to +150c recommended operating conditions (3) supply voltage v in ...........................4.5v to 14v driver voltage v drv .........................4.5v to 5.5v logic voltage v dd ...........................4.5v to 5.5v operating junction temp. (t j ). -40c to +125c thermal resistance (4) ja jc 4x6mm fc-tqfn ................... 36 ....... 8.... c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max) = (t j (max)-t a )/ ja . exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51-7, 4-layer pcb.
mp86885 ? intelli-phase solution in 4x6mm tqfn mp86885 rev. 1.01 www.monolithicpower.com 3 7/22/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. electrical characteristics v in = 12v, v drv =v dd =5v, t a = 25c, unless otherwise noted. parameters symbol condition min typ max units i in shutdown i in off v drv = v dd = 0v 25 65 100 a i in standby i in standby v drv = v dd = 5v, pwm=en=low 30 55 60 a v in under voltage lockout threshold rising 3.4 4 4.5 v v in under voltage lockout threshold hysteresis 340 mv i drv quiescent current i drv quiescent pwm=low 1 ma i drv shutdown current i drv shutdown 200 230 260 a i dd quiescent current i dd quiescent pwm=low 1.5 2.3 3 ma i dd shutdown current i dd shutdown 30 46 60 a vdd voltage uvlo rising 3.3 3.9 4.4 v vdd voltage uvlo hysteresis 300 mv high side current limit (5) i lim 60 a low side current limit (5) -25 a en input low voltage 0.4 v en input high voltage 2 v dead-time rising (5) 3 ns dead-time falling (5) 8 ns sync current i sync v sync =0v -50 -43 a sync logic high voltage 2 v sync logic low voltage 0.4 v pwm high to sw rising delay (5) 35 ns pwm low to sw falling delay (5) 35 ns t lt 60 t tl 50 t ht 75 pwm tristate to sw hi-z delay (5) t th 50 ns minimum pwm pulse width (5) 30 ns v pwm =3.3v, v en =5v 80 100 a pwm input current i pwm v pwm =0v, v en =5v -100 -90 -80 a pwm logic high voltage 2.45 v pwm tristate region 1.1 2.0 v pwm logic low voltage 0.50 v current sense accuracy (5) i out =15a -4 +4 % current sense gain 10 a/a current sense common-mode voltage range 1 3.5 v temperature sense gain (5), (6) 10 mv/c temperature sense offset (5), (6) -100 mv temperature sense accuracy (5) 5 c vtemp pull-down current vtemp=vdd 160 a over temperature protection (5) 170 c notes: 5) guaranteed by design, not tested in production. the par ameter is tested during parameter characterization. 6) see ?junction temperature s ense? section for details.
mp86885 ? intelli-phase solution in 4x6mm tqfn mp86885 rev. 1.01 www.monolithicpower.com 4 7/22/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. 0v vout pwm high tri-state low switch node vin rising lt t t ht t th t tl t falling t 35ns 35ns 60ns 50ns 75ns 50ns pwm delay diagram
mp86885 ? intelli-phase solution in 4x6mm tqfn mp86885 rev. 1.01 www.monolithicpower.com 5 7/22/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. pin functions pin # name description 1 pwm pulse width modulation. leave pwm floating or drive to mid-state to put sw in high impedance state. 2 en on/off control. pull low to place sw in a high impedance state. 3 cs current sense output. requires an external resistor. 4 vtemp single pin temperature sense output. 5 sync synchronous low switch. leave open or pu ll high to enable. pull low to enter diode emulation mode. 6 fault# fault reporting on hs current limit, over temperature and vdd uvlo. it is an open- drain output during normal operation and pull-low when fault occurred. low side current limit will not pull low fault pin. 7 agnd analog ground. 8 vdd internal circuitry voltage. connect to vdrv thru 2.2 ? resistor and decouple with 1f capacitor to agnd. connect agnd and pgnd at this point. 9 rin current sense compensation. connect a resistor from this pin to vin to fine tune current sense gain. 10 t1 test pin. connect to ground. 11 bst bootstrap. requires a 0.22f to 1f capa citor to drive the power switch?s gate above the supply voltage. connects between sw and bst pins to form a floating supply across the power switch driver. 12-15 sw switch output. 16 vdrv driver voltage. connect to 5v supply and decouple with 1f to 4.7f ceramic capacitor. 17-28 pgnd power ground. 29 in supply voltage. place c in close to the device to prevent large voltage spikes at the input.
mp86885 ? intelli-phase solution in 4x6mm tqfn mp86885 rev. 1.01 www.monolithicpower.com 6 7/22/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical characteristics 30 35 40 45 50 55 60 0 20 40 60 80 100 120 140 160 3.45 3.5 3.55 3.6 3.65 3.7 3.75 3.8 3.85 3.9 3.95 input voltage (v) v dd voltage (v) 3 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5 -60 -40 -20 0 20 40 60 80 100120 -60 -40 -20 0 20 40 60 80 100120 -60 -40 -20 0 20 40 60 80 100120 -60 -40 -20 0 20 40 60 80 100120 -60 -40 -20 0 20 40 60 80 100120 -60 -40 -20 0 20 40 60 80 100120 -60 -40 -20 0 20 40 60 80 100120 en threshold voltage (v) 1 1.1 1.2 1.3 1.4 1.5 sync threshold voltage (v) 1 1.1 1.2 1.3 1.4 1.5 en pull down current sync rising sync falling sync pull up current pwm threshold voltage (v) 0 0.5 1 1.5 2 2.5 pwm high pwm low
mp86885 ? intelli-phase solution in 4x6mm tqfn mp86885 rev. 1.01 www.monolithicpower.com 7 7/22/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performanc e characteristics v in =12v, v drv =v dd =5v, v out =1.2v, l=215nh, f sw =600khz, t a =25 o c, no droop, unless otherwise noted. normalized power loss vs. inductance normalized power loss vs. switching frequency normalized loss normalized loss normalized loss 70 75 80 85 90 95 0 5 10 15 20 25 30 35 40 0 5 10 15 20 25 30 35 40 0 2 4 6 8 10 12 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 1.25 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 300 400 500 600 700 800 900 1000 0.94 0.96 0.98 1.00 1.02 1.04 1.06 1.08 1.10 1.12 1.14 100 150 200 250 300 350 400 450 500 500mv/div. 5v/div.
mp86885 ? intelli-phase solution in 4x6mm tqfn mp86885 rev. 1.01 www.monolithicpower.com 8 7/22/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. block diagram control logic temperature sense sw pgnd fault# vtemp bst vdddrv in sync pwm en rin vdrv vdd cs current sense t1 agnd level shift lsfet hsfet en tri-state enable hs current limit internal pwm en tri-state enable hs current limit internal pwm sync tri-state enable pwm hs current limit + - pgnd sw outputs 1 after inductor current zero crossing negative current limit + - sw outputs 1 if sw>1.5v 1.5v delay sw pgnd figure 1: functional block diagram
mp86885 ? intelli-phase solution in 4x6mm tqfn mp86885 rev. 1.01 www.monolithicpower.com 9 7/22/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. operation the mp86885 is a 40a monolithic half-bridge driver with mosfets ideally suited for multi- phase buck regulators. when the en transitions from low to high and both v dd and v bst signals are sufficiently high, operation begins. it is recommended to use en pin to startup and shutdown the intelli-phase. to put sw node in a high impedance state, let pwm pin float or drive pwm pin to mid-state. drive the sync pin low to enter diode emulation mode. in diode emulation mode, the lsfet is off after inductor current crossed zero current. when hsfet over current is detected, the part will latch off. recycling vin/vdd or toggling en will release the latch and restart the device. when the lsfet detects -25a current, the part will turn off the lsfet for that cycle. current sense the cs pin is a bi-directional current source proportional to the inductor current. use the following equations to select the rin resistance to connect between rin pin and in pin: in l _ ripple r7.55i 170(k) =? + on in out out in out l_ripple in sw t(vv)v (vv) i lvfl ? ? == where i l_ripple is the peak to peak inductor ripple current. for example, if the ripple current is 10a, then the calculated r in is 94.5k ? and 95.3k ? (the closest 1% resistor value) should be selected for r in . the current sense gain is 10 a/a. in general, there is a resistor, r cs , connected from cs pin and v out or an external voltage which is capable to sink small current to provide enough voltage shift to meet the operating voltage on cs pin. the cs voltage range of 1v to 3.5v is required to keep cs?s output current linearly proportional to inductor current. use the following equations to determine a proper reference voltage and/or r cs value: cs cs ref 1v i r v 3 . 5 v < + < 6 cs l i i 10 10 ? = intelli-phase?s current sense output can be used by controller to accurately monitor the output current. the cycle-by-cycle current information from cs pin can be used for phase current balancing, over current protection and active voltage positioning (output voltage droop). intelli-phase?s accurate current sense can replace traditional inductor dcr current sensing scheme. in traditional inductor dcr current sense: cs l dcr vir = with intelli-phase?s cs output, v cs becomes: 6 cs cs cs l cs virir1010 ? = = where the r dcr term is replaced with 6 cs r1010 ? . figure 2 shows a circuit replacing inductor dcr sensing with intelli- phase?s cs output. there are several advantages with this current sensing method: 1. since current sensing is done by intelli- phase, user can select low dcr inductors and still have large current sense signal by selecting larger r cs . 2. tight dcr variation is not required. 3. cs signal is independent of impedance matching and inductor temperature.
mp86885 ? intelli-phase solution in 4x6mm tqfn mp86885 rev. 1.01 www.monolithicpower.com 10 7/22/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. figure 2: replacing dcr current sense with intelli-phase?s cs output junction temperature sense the vtemp pin is a voltage output proportional to the junction temperature. the junction temperature can be calculated from the following equation: () temp junction o v100mv t 10mv c + = , for t junction >10 o c for example, if the vtemp voltage is 700mv, then the junction temperature of intelli-phase is 80 o c. vtemp can not go below 0v, so it will read 0v for junction temperature lower than 10 o c. be sure to measure this voltage between vtemp and agnd pins for the most accurate reading. in multi-phase operation, the vtemp pins of every intelli-phase can be connected to the temperature monitor pin of the controller. a sample circuitry is shown in figure 3. vtemp signals can also be used for system thermal protection as shown in figure 4.
mp86885 ? intelli-phase solution in 4x6mm tqfn mp86885 rev. 1.01 www.monolithicpower.com 11 7/22/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. l1 pwm intelliphase pwm1 l2 pwm vin vin pwm2 vtemp vin vin vtemp intelliphase intelli-phase power stage v out c out multi-phase controller temperature adc figure 3: multi-phase temperature sense utilization r 2 vtemp1 vtemp2 r 1 program r1 and r2 to set the protection temperature for system protection npn figure 4: system thermal protection
mp86885 ? intelli-phase solution in 4x6mm tqfn mp86885 rev. 1.01 www.monolithicpower.com 12 7/22/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. pcb layout guide line pcb layout plays an important role to achieve stable operation. for optimal performance, follow these guidelines. the sample layout at the end of these guidelines can be used as a layout reference. 1. always place some input bypass ceramic capacitors next to the device and on the same layer as the device. do not put all of the input bypass capacitors on the back side of the device. use as many via and input voltage planes as possible to reduce switching spikes. place the bst capacitor and the vdrv capacitor as close to the device as possible. 2. place the vdd decoupling capacitor close to the device. connect agnd and pgnd at the point of vdd capacitor's ground connection. 3. it is recommended to use 0.22f to 1f bootstrap capacitor and 3.3 ? bootstrap resistance. do not use capacitance values below 100nf for the bst capacitor. 4. connect in, sw and pgnd to large copper areas and use via to cool the chip to improve thermal performance and long-term reliability. 5. keep the path of switching current short and minimize the loop area formed by the input capacitor. keep the connection between the sw pin and the input power ground as short and wide as possible. figure 5: sample pcb layout
mp86885 ? intelli-phase solution in 4x6mm tqfn mp86885 rev. 1.01 www.monolithicpower.com 13 7/22/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical application circuits vout pgnd vin sclk sdio alert# cpu vtt 5v vrrdy vrhot# 5v vin fault# en vout pgnd vin sw pgnd bst vdrv agnd en pwm cs vtemp sync r boot r tmax r iccmax r addr r fs r aam r slope r imon cs1 cs2 cs3 cs4 pwm1 pwm2 pwm3 pwm4 ccm vosen gndsen idroop vidff comp fb ocpset iref vcc gnd (pad) vdd sclk sdio alert# addr vrrdy vrhot# imon fault# temp en vboot tmax aam slope fset mp2935 4-phase vr12.5 pwm controller vcm icc max otpg otpd vdd vin 5v vin sw pgnd bst vdrv agnd en pwm cs vtemp sync vdd vin 5v vin sw pgnd bst vdrv agnd en pwm cs vtemp sync vdd vin 5v vin sw pgnd bst vdrv agnd en pwm cs vtemp sync vdd intelli-phase intelli-phase intelli-phase intelli-phase figure 6: mp2935+intelli-phase application circuit
mp86885 ? intelli-phase solution in 4x6mm tqfn notice: the information in this document is subject to change wi thout notice. please contact m ps for current specifications. users should warrant and guarantee that third party intellectual property rights ar e not infringed upon when integrating mps products into any application. mps will not assume any legal responsibility for any said applications. mp86885 rev. 1.01 www.monolithicpower.com 14 7/22/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. package information fc-tqfn (4mm x 6mm)

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